I/O Systems

Overview

Input/Output (I/O) systems connect the CPU to peripheral devices like storage, networking, displays, and input devices. Understanding I/O architecture — buses, protocols, and interfaces — is essential for system design interviews and for understanding how data moves between the CPU and the outside world.

I/O Architecture

graph TD
    CPU["CPU"] --> Cache["Cache Hierarchy"]
    Cache --> MC["Memory Controller"]
    MC --> DRAM["Main Memory (DRAM)"]
    CPU --> PCIe["PCIe Root Complex"]
    PCIe --> GPU["GPU"]
    PCIe --> NVMe["NVMe SSD"]
    PCIe --> NIC["Network Card"]
    CPU --> USB["USB Controller"]
    USB --> Keyboard["Keyboard"]
    USB --> Mouse["Mouse"]
    CPU --> SATA["SATA Controller"]
    SATA --> HDD["HDD"]
    SATA --> SSD["SATA SSD"]

Key I/O Concepts

Programmed I/O (PIO)

CPU directly reads/writes I/O device registers:

while (data_ready) {
    data = read_device_register();  // CPU busy-waits
    process(data);
}

Problem: CPU is fully occupied during I/O.

Direct Memory Access (DMA)

Device transfers data directly to/from memory without CPU intervention:

sequenceDiagram
    participant CPU
    participant DMA as DMA Controller
    participant Device
    participant Memory
    
    CPU->>DMA: Set up transfer (source, dest, size)
    CPU->>Device: Start I/O
    Device->>DMA: Data ready
    DMA->>Memory: Transfer data (no CPU involvement)
    DMA->>CPU: Interrupt when done
    CPU->>CPU: Process data

Benefit: CPU is free during data transfer.

Interrupts vs Polling

Modern systems use interrupt coalescing — batching multiple events into one interrupt.

Bus Types

Cross-References

• PCIe — Primary expansion bus
• USB — Peripheral interconnect
• SATA — Legacy storage bus
• NVMe — Modern storage protocol
• Buses — Bus fundamentals
• Storage Overview — Storage technologies

Cross References

• Buses
• PCIe
• NVMe
• OS I/O